Dr. Venkatarao Ryali,
Dr. Venkatarao Ryali,
Title: Wind Farm Optimization & Controls: An Industrial Cyber-Physical Systems Perspective
Abstract: In this talk, we present the optimal design and control of a wind farm with its interconnected network of wind turbines & grid interfaces, hierarchical control systems, and software architectures that span computing from the edge to the cloud, as a rich use-case for the study & development of modeling, simulation, analysis, and control paradigms for industrial cyber-physical systems.
A key objective in the design & control of a wind farm is to maximize its energy yield while operating the turbines reliably over a period of years deemed suitable for a maximal return on investment. The energy production from a wind farm is a complex function of stochastic environmental factors, site topography & orography, layout design & operation of the turbines that modulate & change the wind flow patterns & associated energy levels across the farm, structural & aero dynamics of the wind turbines, and grid integration constraints. For tractability and scale, any approach to solving the above problem should seamlessly blend diverse modeling & simulation methodologies that capture phenomenological aspects of the problem with design formalisms associated with the networking, data sciences, and controls parts of the problem. In this talk, we share our experiences to this end and highlight research challenges and opportunities with learning-based adaptation (modeling, optimization, controls), distributed sensing, and compute scalability from the edge through the cloud – topics that are relevant not only for the wind use-case, but also the broader industrial IoT application space.
Bio: Venky Ryali is with the Loads & Controls Chief Technology Office of the Onshore Wind division of GE Renewable Energy. He is the global leader for GE’s efforts on Wind Farm Optimization. Most recently, he was a Senior Engineering Manager for Loads and Controls of GE Renewable Energy (Onshore Wind) managing a team out of Bangalore & Hyderabad. Prior to this, Venky had a stint of nearly 16 years with the Controls lab at GE Global Research, India, in roles with increasing responsibility as an individual contributor, program leader, lab manager, and senior principal engineer. He has overseen multi-million dollar efforts in the Energy, Oil & Gas, Transportation, and Healthcare domains that have resulted in successful products, services, & prototypes, notably in the areas of Wind Farm Optimization & Controls, Locomotive Traction Controls, IC Engine Controls, Emission Control of Gas & Coal Power Plants, Industrial & Biomedical Signal Processing. His experience with academia includes stints as Assistant Professor in E.C.E. at IIT Guwahati and as visiting faculty with the Dept. of Instrumentation at IISc Bangalore. An electronics engineer by basic training, Venky has a Ph.D. in Systems & Control Engineering from IIT Bombay. He has specialized in controls, optimization, & signal processing and has strong allied interests in machine learning & high performance/ edge computing.
Title: Software Defined Robotics
Abstract: Robots as cyber physical machines embedding intelligent agents capable of performing various tasks with multiple levels of autonomy in interaction with the world around, are witnessing next wave of disruption. Beyond assembly lines they are poised to participate extensively in our home, work and social spaces. Popular technology frameworks like IoT are adopting these machines as sensing and actuation agents in their architectures. When robots need to participate seamlessly in such large systems there is a need for standardization through systematic softwarization and orchestration of sensing, guidance, navigation and manipulation functions. They need to be aware of each other to jointly optimize their resources and operations. Software defined Robotics is conceptualized to address these issues.
Bio: Dr. Balamuralidhar P is a Principal Scientist and Head of TCS Research & Innovation Lab at Tata Consultancy Services Ltd (TCS), Bangalore. He has obtained Bachelor of Technology from Kerala University and Master of Technology (MTech) from IIT Kanpur. His PhD is from Aalborg University, Denmark in the area of Cognitive Wireless Networks. Major areas of current research include different aspects of Cyber Physical Systems, Sensor Informatics & Internet of Things, Robotics & Computer Vision. He has lead several research projects and programs in the above areas.
Dr.Balamuralidhar has over 30 years of research and development experience. He has over 100 publications in various international journals and conferences and over 50 patent filings, out of which 25 have been granted. He is the co-author of a book titled ‘IoT-Technical Challenges and Solutions’ published by Artech Book House. He has co-authored several book chapters and was a guest editor of an International journal on ICT. He has delivered several keynote addresses and invited talks in reputed conferences and symposiums. He is a senior member of IEEE.
TCS Innovation Labs
Prof Sudip Misra,
Title: Internet of Things: Enabling cross-domain convergence and innovation
Bio: Dr. Sudip Misra is an Associate Professor in the Department of Computer Science and Engineering at the Indian Institute of Technology Kharagpur. Prior to this he was associated with Cornell University (USA), Yale University (USA), Nortel Networks (Canada) and the Government of Ontario (Canada). He received his Ph.D. degree in Computer Science from Carleton University, in Ottawa, Canada. He has several years of experience working in the academia, government, and the private sectors in research, teaching, consulting, project management, architecture, software design and product engineering roles.
His current research interests includes Wireless Ad Hoc and Sensor Networks, Internet of Things (IoT), Software Defined Networks, Cloud Computing, Big Data Networking, Computer Networks, Learning Systems, and algorithm design for emerging communication networks. Dr. Misra is the author of over 260 scholarly research papers, including 150+ reputed journal papers. Dr. Misra has published 9 books in the areas of wireless ad hoc networks, wireless sensor networks, wireless mesh networks, communication networks and distributed systems, network reliability and fault tolerance, and information and coding theory, published by reputed publishers such as Cambridge University Press, Springer, Wiley, and World Scientific.
Title: Intelligent Control of Robotic Systems
Abstract: This talk will cover the development of artificial Intelligence based autonomous robots. Use of machine learning tools such as self-organising maps, approximate dynamic programming, fuzzy neural networks, and deep learning will be demonstrated in different vision guided robotics applications. Integrating machine intelligence with control theory to ensure stability of such systems will be demonstrated. Some of the interesting applications such as ware-house automation, imitation learning in games, drone assisted driver assistance system and pipeline inspection will be demonstrated. Challenges concerning robotics intelligence based on our research work will be highlighted.
Bio: Dr Laxmidhar Behera is working as the Professor at IIT Kanpur having research and teaching experience of more than 23 years. He has received the BSc (engineering) and MSc (engineering) degrees from NIT Rourkela in 1988 and 1990, respectively. He received the PhD degree from IIT Delhi in 1996. He pursued the postdoctoral studies in the German National Research Center for Information Technology, GMD, Sank Augustin, Germany, during 2000-2001. Previously, he has worked as an assistant professor at BITS Pilani during 1995- 1999 and as a reader at Intelligent Systems Research Center (ISRC), University of Ulster, United Kingdom during 2007-2009. He has also worked as a visiting researcher/professor at FHG, Germany, and ETH, Zurich, Switzerland. He is one of the pioneers in the field of AI based autonomous robotics. His work lies in the convergence of machine learning, control theory, robotic vision and heterogeneous robotic platforms. He has received more than INR 15 crore research grants to support his research activities – the recent one being DST-UKIERI International grant. He has established industrial collaboration with TCS, Renault Nissan, and ADNOC, Abu Dhabi while making significant technological development in the areas such robotics based ware-house automation, vision and drone guided driver assistance system, and drone guided pipeline inspection systems. He has published more than 220 papers in Journals and Conference Proceedings. He is a Fellow of INAE and Senior Member of IEEE. His other research interests include intelligent control, semantic signal/music processing, neural networks, control of cyber-physical systems and cognitive modelling.
Prof Laxmidhar Behera,
Title: “A different view on robustness of electronic devices in the IoT era”
Abstract: Classical quality requirements of life time and robustness against large amplitude interferences relate to test methods and targets levels for either a semiconductor (or NEMS/MEMS component) or the final electronic system. In general there is no traceable connection between these tests and test target levels of component and system level such that with increased level of component robustness an increased robustness of the system can be expected. In many cases this has been proven the adverse. Typically supplier and customer learn while refining the design approaches over several generations of products to achieve a stable robustness level. However, in a world of flexible combinations of different electronic base components like sensors and ICs used in completely different applications this can be an expensive hedgehog and hare game. A concept has been developed in ESD design called system efficient ESD design (SEED) which bridges from IC level protection to system level protection. This concept is discussed to show case a fundamental approach for a full understanding of protection design from the semiconductor component to a complete electronic system. This can equally be applied for protection against hard fails as well as for malfunction or soft fails. Developing this idea further can be a hardly overestimated driving force for spreading of IoT applications.
Title: Negative Capacitance Transistors – Physics, Modeling and Processor performance at VDD = 0.4V
Abstract: The ongoing scaling of CMOS technology is now reaching its limit, due to supply voltage reduction being restricted by the subthreshold swing (SS) of 60mV/decade achievable at room temperature owing to Boltzmann transport of the charge carriers. Concept of negative capacitance proposed to achieve a sub-60mV/decade SS is currently seen as one of the potential solution to the problem. A “negative capacitance transistor (NCFET)” employs a ferroelectric material in the gate stack of a FET providing a negative capacitance and thereby an “internal voltage amplification” at the gate of the internal FET which helps in reducing SS. Several experiments have successfully demonstrated an improved SS with the bulk MOSFET, FinFET, and 2D FETs. The improvement in subthreshold characteristics is also accompanied with the advantage of an increased ON current relative to the reference FET as has been observed both in simulation studies and experiments. In this talk, I will discuss the physics and modeling of various NCFET structures and impact of this new transistor on circuits including processors.
Prof. Yogesh Singh Chauhan
H. S. Jatana
Title: Challenges in design of SoC in low geometry nodes
Abstract: Based on application, it has become almost a necessity that analog, digital, RF and memory blocks are integrated on the same chip. This helps in increasing functionality, increasing performance and reducing cost. the talk focusses on issues in design of SoC at lower geometry. Challenges in pad-to-pad simulation, power grid design, floor plan, Integrated layout and chip finishing are discussed. For space and military application, the product needs to be radiation hardened with respect to TID (>200Krad), LET (>80 Mev cm2/mg), and design becomes more challenging. The design of multi-core Data Converters ( ADC + DAC) has been taken as test case.
Bio: HS Jatana Received his engineering education from BITS Pilani. Worked at AMS Austria for porting of SCL’s CMOS processes at their foundry. Had vast experience on CMOS design, testing, characterization and failure analysis, process development / porting and integration.
Presently, as Group Head at SCL, is responsible for design of VLSI products (ASICS and standard products). His areas of interest are analog design, development of compatible add-on process options compatible to standard CMOS flow and Process Integration issues in DSM era. Also interested in spreading VLSI education and have delivered numerous lectures on VLSI at various Institutes.
Title : Engineering Ge and 2D MoS2 transistors for advanced CMOS
Abstract: Germanium has emerged as a strong candidate for replacing Si for future CMOS technologies due to higher carrier mobilities and compatibility with Si processing. However issues such as a poor gate interface, small band-gap, low n-type dopant activation and Fermi-level pinning near the valence band have posed fundamental challenges, especially for realizing high performance n-FETs. This talk will present some of our recent efforts towards engineering high quality gate stacks and low resistance source-drain contacts on Ge through novel processes and materials.
Ultra-thin 2D transition metal dichalcogenides such as MoS2 promise excellent short-channel control for sub-10 nm logic. Recent efforts in our group at reducing contact resistance to MoS2, selectively doping it to realize high performance lateral p-n junctions, and understanding the origins of hysteresis in MoS2 transistors will be discussed.
Bio: Prof. Saurabh Lodha graduated with a B. Tech (EE) from IIT Bombay in 1999 and with a Masters (ECE) and PhD (ECE) from Purdue University in 2001 and 2004 respectively. His graduate research focused on III-V metal/semiconductor interfaces and molecular electronics. From 2005-2010 he worked at Intel Corporation in Portland, USA where he was part of the team responsible for the research and development of 45nm, 32nm and 22nm CMOS technologies. He joined IIT Bombay in July 2010 where his current research interests are in the areas of advanced CMOS, 2D TMD devices and Si photovoltaics.
Prof. Saurabh Lodha
Title: Emerging Memory and Nest Architecture Overview
Abstract: System architects and designers have always wanted more from the memory subsystem with very high performance, high bandwidth, huge capacity, all at minimal or zero cost. Main memory is a critical component and is a fundamental factor in the performance and power consumption of most computing devices. With recent increases in processor core performance and the growing requirements of per core, per thread, bandwidth, efficiency, and predictability out of the memory subsystem make it an even more important and challenging in designing systems. Will the conventional DRAM, Flash memories scaling and IO architecture work for system architects in the future to design a high-performance compute node? What are the alternative emerging memory and nest architectures?
Bio: Saravanan Sethuraman is the Senior Research Engineer focusing on POWER Server Memory Subsystem Development at IBM India Systems Development Lab in Bangalore. He has 18 years of Industry experience which includes system architecture, design & development leading to volume manufacturing. He is currently focusing on the next generation memory subsystem architecture for the upcoming IBM’s high-performance compute nodes. He is a JEDEC member working to define DDR4, 3DS and future memory technology standards. He is appointed as IBM Master Inventor with 100+ patents/applications and published papers in IEEE conferences in future memory architectures and reliability. He is serving as vice-chairman for IEEE Solid State Circuits and Electron Devices Society, Bangalore chapter and a IEEE Senior member. He has received his MS degree from BITS-Pilani and is a member of IBM India Technical Experts Council affiliated by IBM Academy of Technology.
Title-Hardware design challenges for next generation computing
Abstract: The talk focusses around current hardware design life cycle, discussions around critical drivers for design process changes, where are the key gaps etc. The talk invokes thoughts around how the engineering community may come together to address these gaps.
Bio: Parthasarathy Ramaswamy (Partha) 20 years of industry experience in the area of High speed Signaling and power delivery- Currently a principal Engineer at Intel Server engineering division leading Signal and power integrity teams. Partha has a Ph.D. in electromagnetics and has many patents filed/granted and publications in this area.
Dr. Amith Singhee
Title-Al at the Edge and Related Topics
Dr. Amith Singhee is a Manager and Senior Technical Staff Member at IBM Research, India. He leads the research agenda for Industry Solutions in the sectors of Retail, Distribution and Buildings. From 2008 to 2015, he was with the IBM T. J. Watson Research Center in NY, USA. He has extensive experience in applying artificial intelligence, IoT, enterprise architecture, Cloud and mobile to real-world business processes across multiple sectors such as energy, agriculture, buildings and retail. He has worked with large power utilities in the US to develop solutions for improved storm preparation and response using data analytics, machine learning, customized weather forecasting and optimization. He led an effort to develop a big-data analytics platform for developing and deploying a wide array of analytics-driven solutions for asset-heavy industries like energy and utilities, telecom, etc. This led to multiple new product offerings from IBM. In the past he has also worked for many years in electronic design automation, particularly in design optimization, simulation, modeling and design methodologies in the presence of environmental and manufacturing variability. As part of his work at IBM Research he led the effort to define a new methodology for SRAM technology development at advanced IC manufacturing technology nodes.
From 2002 to 2004, Amith was at Neolinear, Inc, and subsequently Cadence Design Systems, where he was the lead developer of the circuit optimization engine in the NeoCircuit tool, and developed new methods for stochastic optimization of analog circuits and automated design of hierarchical, system-level designs.
Amith has a PhD in Electrical and Computer Engineering from Carnegie Mellon University. He is a winner of several awards, specifically the Donald O. Pederson award from IEEE/CEDA, the Outstanding Dissertation Award from EDAA, the Arthur G. Milnes Award from Carnegie Mellon University, and best paper awards at top Power and EDA conferences, such as IEEE PES General Meeting, DAC, DATE and VLSI Design. He is a Senior Member of the IEEE and a member of the ACM.
Title: Applying Data Science to Real-World Problems
Abstract: Many basic services that are essential to human dignity, such as healthcare and education remain inaccessible (at acceptable quality level) to large numbers of people. With increasing digitization of the world and easy availability of computational power, there is an opportunity to apply data science to transform these services. We begin by describing a dire need and an opportunity to improve the healthcare system worldwide by supporting a shift from reactive treatment to more proactive action. As examples of what is possible, we present machine learning techniques to predict a class of complications in an ICU, and to identify patients in a hospital who are likely to experience a deterioration in their medical condition. We also present work that shows the applicability of remote sensing and data analytics to measure body vitals such as respiration and heart rate, to screen for diseases, and to reduce the need for people to visit a hospital. We then describe our attempts to make learning more effective via a platform called VideoKen. Our platform, available as a cloud-hosted portal, uses novel techniques to evaluate videos, support search and recommendation of educational videos on a given topic, index them to support more effective navigation, e.g., by automatically generating a table of contents and glossary, and to gain insights from the learner’s interactions with the videos. VideoKen also supports social learning at multiple levels. It enables faculty to conveniently share their curated video content within and across institutes, thus helping each other as a community. Likewise, it enables students also to curate specific video clips and share with their classmates, friends or the community at large. We describe many outstanding challenges in creating an engaging and personalized learning experience for each learner, and describe our preliminary efforts to deal with those challenges. We frame all of the above efforts as examples of using data science to offer personalized services at scale.
Bio: He is the Infosys Foundation Chair Professor at IIIT Bangalore and co-founder and CEO of VideoKen, an educational technology startup. Served as Vice President and Director of Xerox Research Center India (XRCI) from 2013-2016, helping build XRCI into a world class research center. Earlier helped take IBM Research – India to a high level of impact on IBM business (recognized internally through a record number of IBM Research Division Accomplishments) and significant external recognition (13 best paper awards at international conferences during my tenure of four years). Led research at IBM T.J. Watson Research Center on system software for the Blue Gene supercomputer, for which IBM received the National Medal of Technology and Innovation in 2009 from the US President, and other Deep Computing platforms. Has received an Outstanding Innovation Award, two Outstanding Technical Achievement Awards, and the Lou Gerstner Award for Client Excellence at IBM. He has co-authored about 75 papers in the areas of parallel computing, high performance compilers, and Java Virtual Machine optimizations, with over 6,000 citations in Google Scholar and an h-index of 42, and has been granted 19 US patents. He has served on the US National Science Foundation Committee of Visitors and has been invited to give keynotes at several international conferences like ICSOC, IPDPS, DEBS and HiPC. Currently serving as Chair of IKDD, the ACM India Chapter for Knowledge Discovery and Data Mining. He is an ACM Fellow, a Fellow of the Indian National Academy of Engineering, and have received a Distinguished Alumnus Award from Indian Institute of Technology, Delhi.
Dr. Manish Gupta
Dr. Arpita Patra
Title: Multi-party Computation
Abstract: Multiparty Computation (MPC) is arguably the ‘holy-grail’ problem in cryptographic protocol theory. This talk will cover the basics of MPC and will conclude with the state-of-the art of the topic
Bio: The focus of my research is the theoretical foundations of cryptography that are concerned Research Interests with the feasibility of securely realizing cryptographic tasks, finding inherent lower bounds on the computational resources that are needed for solving cryptographic tasks and finding resource efficient secure constructions. The resources most often considered are computational complexity (i.e., measuring the time required to compute some cryptographic function like encryption or secure computation of a functionality), round and communication complexity (i.e., the number of rounds and bandwidth required for a secure interactive protocol). The topics of cryptography I have been interested in so far include: Secure Communication, Secure Multiparty Computation, Verifiable Secret Sharing, Adaptive Security, Public Key Encryption, Oblivious Transfer, Zero Knowledge Proofs, Byzantine Agreement and Broadcast.
Title: IoT Solutions – modeling the environment and the devices
Abstract: There is a lot being said about the value IoT has been bringing to society although it is early days in several ways. For IoT solutions to successfully be adopted in a large scale it has to be simplified. A part of the simplification is the easy access to analytics so that one has access to information in the data being sensed. Often it requires a lot more than that to “close the loop”, take actions, that is. A direction towards simplifying this is to make not just the data but also the device operations accessible to reasoning. In this talk we look at research and engineering activity in this direction.
Bio: Dr. Badrinath is working as a Principal Engineer with Ericsson Research, Bangalore, where he is part of a team that deals with the management and operations of Cyber-Physical Systems. He earlier worked with HP in various capacities in the areas of Cloud systems, High Performance Computing, Semantic Web and Infrastructure Management. Prior to HP he served as a faculty at IIT Kharagpur for about nine years, where his core area of research has been Graph theory and interconnection networks. He was a visiting faculty at IRISA, Rennes in 2002. He is currently also teaching at the Indian Statistical Institute. He has been General Co-chair for the IEEE HiPC conference several times over the past years. He has a PhD from RPI in the USA and an MSc(Tech) from BITS, Pilani, India.
Dr. Badrinath Ramamurthy
Dr. V. Sridhar
Title: Challenges in Spectrum allocation for 5G in India
Abstract: Spectrum allocation and assignment are critical for deployment of 5G services. Though recent consolidation in the industry has increased effective spectrum holding of the operators, there are still challenges in the allocation of sub-GHz spectrum for access, V and E band spectrum for backhaul, and release of unlicensed spectrum both in sub-GHz and in 60 GHz. The talk will highlight challenges in release of spectrum from alternate users, harmonization of spectrum for contiguous block allocation, as well as appropriate prices for licensed spectrum, given the regulatory legacy and nature of the industry in India. The talk will also highlight the regulatory and policy steps that have been taken so far in spectrum trading, leasing and sharing and prescribe way forward.
Bio: Dr. V. Sridhar works in the area of telecommunications technology, management and policy. He has published many peer-reviewed articles in leading telecom and information systems journals. His book titled The Telecom Revolution in India: Technology, Regulation and Policy was published by the Oxford University Press India (2012). He has co-authored a recent book titled The Dynamics of Spectrum Management: Legacy, Technology, and Economics, published by the Oxford University Press (2014).
Dr. Sridhar has taught at Ohio University and American University in the U.S.; visiting scholar at Aalto University, Finland and University of Auckland, New Zealand; and was in the faculty of IIM Lucknow and Management Development Institute, Gurgaon, India. Prior to joining IIITB, he was a Research Fellow at Sasken Communication Technologies, Bangalore, India.
He has been a member of Government of India committees on spectrum allocation and pricing. He has written more than 200 articles on telecom regulation and policy in prominent business newspapers and magazines. Dr. Sridhar has a Ph.D. from the University of Iowa, U.S.A.; PGDIE from the National Institute of Industrial Engineering (NITIE), Mumbai, India and Bachelor of Engineering from the University of Madras, India.
Title: Base Station-Side Estimation Algorithms in Cellular Systems with Reduced Feedback
Abstract: Orthogonal frequency division multiplexing (OFDM) is the physical layer technology of choice in contemporary 4G and 5G cellular communication standards. These standards make extensive use of reduced feedback techniques to provide the required channel state information to the base station to help it determine the user to schedule and the data rate without getting overwhelmed by the feedback overhead.
In the talk, we review the rate adaptation and scheduling in cellular systems and the reduced feedback techniques used to facilitate these. We then present novel base station-side estimation techniques that exploit the structure of the information fed back and statistical information about the channel gains to improve the system throughput without incurring any additional feedback overhead.
Bio: Neelesh B. Mehta received his B. Tech degree in Electronics and Communications Engineering from the Indian Institute of Technology (IIT) Madras, in 1996, and M.S. and Ph.D. degrees in Electrical Engineering from the California Institute of Technology, Pasadena, USA, in 1997 and 2001, respectively. He is a Professor in the Department of Electrical Communication Engineering at the Indian Institute of Science (IISc), Bangalore. Prior to joining IISc in 2009, he served as a research scientist in USA from 2001 to 2007 in companies such as AT&T Research Labs, Broadcom Corporation, and Mitsubishi Electric Research Labs (MERL). His research focuses on wireless communications. He has worked on topics related to 3G, 4G, and 5G cellular communication standards, energy harvesting and green wireless sensor networks, cognitive radio, cooperative communications, multi-antenna technologies, and multiple access protocols.
He served on the Board of Governors of the IEEE Communications Society from 2012-15. He is a Fellow of the Indian National Academy of Engineering (INAE) and the National Academy of Sciences India (NASI). He is a recipient of the Shanti Swarup Bhatnagar Award, Swarnajayanti Fellowship, NASI-Scopus Young Scientist award, INAE Young Engineer award, and the Hari Om Ashram Prerit Vikram Sarabhai Research Award. He currently serves as an editor of the IEEE Transactions on Communications and as the Chair of the Executive Editorial Committee of the IEEE Transactions on Wireless Communications.
Dr. Neelesh B. Mehta
Gopinath KN (Gopi)
Title: Wi-Fi User Experience in the Wild: Key Insights from a Machine Learning and Big Data Based Analysis
Abstract: This talk presents what we believe is the first real-life based analysis of Wi-Fi user experience – Wi-Fi connectivity and performance issues. Data points from over thirty million (30 million) plus Wi-Fi connections and two hundred and thirty thousand (230K) Wi-Fi clients are analysed. We first provide an overview of how statistical baselining and machine learning algorithms can be applied to characterize Wi-Fi user experience. We then proceed to provide key insights derived from our production cloud that implements these techniques using a big data platform. First order parameters affecting Wi-Fi user experience across the two RF bands and four market verticals is presented.
Bio: Gopinath KN (Gopi) has more than 20 years of experience in systems, networks and security. He is one of the founding employees at Mojo Networks and has spent the last decade creating cutting-edge secure access solutions. As the Vice President of Engineering, he is in charge of the overall technical development and engineering delivery of the flagship secure access product line. He has successfully led the delivery of several technology intensive product releases to the market. Gopi is also responsible for people management and process innovation within the engineering organization. In addition to overseeing engineering activities, he has been actively involved in conceiving forward-looking projects to create compelling market differentiators for Mojo Networks. Gopi has several patents and technical publications to his credit. Gopi has presented at popular international conferences such as RSA, Interop, CSI, WLPC, CWNP and other IEEE/ACM events. Previously, he worked for Information Sciences Research Center, Bell Labs (Alcatel-Lucent’s research organization, NJ, USA). Gopi holds a Master of Technology degree (MTech., Computer Science & Engineering) from IIT Kanpur, India.
Title: A Scattered Look at Some Data Analysis Techniques for Energy Management and Smart Factory
Abstract: Data analysis is playing significant role in different domains, providing insights and outputs for the efficient management of the systems and the subsequent automation. In this talk, an effort would be made to spell out some of the algorithms/solutions developed in the last couple of years at TCS Research and Innovation, while analyzing the energy-consumption data and the data from CNC machines. The discussion would be biased towards Electrical Load Disaggregation and the prediction of tool wear. There would be an opportunistic introduction to Graph Signal Processing, a latest area holding tremendous promise for arriving at elegant and useful data-analysis techniques.
Bio: Dr. M. Girish Chandra is with the TCS Research & Innovation from Jan 2005, presently a Principal Scientist. Earlier, he was with the Aerospace Electronics Division of National Aerospace Laboratories (NAL), Bangalore, holding the position of Assistant Director. His research interests are in the broad areas of Communications and Signal Processing, including Graph Signal Processing, Compressive Sensing & Sparse Signal Processing, Source Separation, Error Control Coding, Channel Equalization, Geolocation, Cognitive Radio & Networks, Cross-Layer Design, Adaptive & Multimedia Signal Processing as well as Signal Processing & Machine Learning for Large (Big) Data. He has more than 75 publications in Journals/ Conferences and has filed 20 patents with co inventors (10 granted so far). Girish obtained his PhD (and the DIC) as a Commonwealth Scholar in Digital Communication from Imperial College, London; MTech (Communication Systems and High Frequency Technology) from IIT Madras; and BE (Electronics) from UVCE, Bangalore
Dr. M Girish Chandra
Title: GaN Power Device Reliability
Abstract: Despite the promising performance of GaN-based power devices in high power and high frequency applications, they suffer serious reliability issues which pose bigger challenge to the wide spread adoption of GaN device technology. In fact, many failure mechanisms observed today in GaN devices were never observed in conventional Si and other III-V semiconductor technologies. These new degradation phenomena in GaN devices are associated to their extreme operating conditions like higher current densities, higher temperatures, and higher electric fields and are native to its material properties like piezoelectric nature, intrinsically high defect density and thermal mismatch due to heteroepitaxy. Moreover, the degradation physics in GaN devices still stays unclear and most of the explanations present in literature use failure models developed for conventional Si or GaAs devices. In absence of suitable failure models, and immature simulation deck, TCAD study of GaN based devices is another challenge! A clear understanding of reliability mechanisms will pave way to robust device technology while reaping the intrinsic benefits of GaN.
Bio: Bhawani Shankar is presently a research scholar at Department of Electronic Systems Engineering, Indian Institute of Science, Bangalore. His research focuses on reliability of GaN power devices. He received M.E. in Electrical Engineering with specialization in Power Electronics, from Birla Institute of Technology and Science (BITS), Pilani, India in 2013. His graduate research focused on study of metal/semiconductor interface in SiC based Schottky barrier diodes.
Title: Innovations in 3GPP 5G core network
Abstract: The talk will focus on the new features 3GPP has defined in 5G core network architecture in phase 1 of 5G standardization, the use cases they solve and a comparison of 5G core network features against existing LTE EPC core network features.
Bio: Sridhar Bhaskaran is a Senior Systems Architect working on 5G Core Network Research and Standardization at Huawei. He is currently working on the service based architecture definition in 3GPP SA2 and correspondingly the protocol definition in the 3GPP CT groups. He has 15 years of industry experience in Telecommunication end equipment (UE) and network side with 4 years of active involvement in standards and industry relations. He has been an active contributor to 3GPP standards in the area of Cellular IoT, Control/User plane separation and 5G. He has also contributed to Open Networking Foundation Standards extending OpenFlow for GTP tunneling. He has 6 issued patents and several more patents under various stages of filing. He had been awarded as an outstanding technical contributor to ONF in March 2016
Chandra R. Murthy
Title: Scaling up Bayesian Sparse Signal Recovery Algorithms for Big Data Applications
Abstract: Bayesian algorithms for sparse signal recovery, and in particular, the multiple sparse Bayesian learning (M-SBL) algorithm, have been empirically shown to far outperform other existing algorithms in terms of the number of measurements required for faithful recovery of the sparse signals. However, these algorithms are considered to be significantly slower than existing methods. First, we present some new insights into the M-SBL cost function, where we uncover features built into the cost function that endow it with its excellent performance. Then, using this insight, we present a few different ways to overcome the computational bottleneck, resulting in a speed up of over two orders of magnitude, while retaining the excellent performance of M-SBL. Finally, we present simulation results illustrating the superior performance and low complexity of our proposed algorithms.
Bio: Chandra R. Murthy received the B.Tech. degree in Electrical Engineering from the Indian Institute of Technology, Madras in 1998, and the M.S. and Ph.D. degrees in Electrical and Computer Engineering from Purdue University and the University of California, San Diego, in 2000 and 2006, respectively. From 2000 to 2002, he was at Qualcomm Inc., where he worked on WCDMA baseband transceiver design and 802.11b baseband receivers. From Aug. 2006 to Aug. 2007, he worked as a staff engineer at Beceem Communications Inc. on advanced receiver architectures for the 802.16e Mobile WiMAX standard. In Sept. 2007, he joined as a faculty at the Department of Electrical Communication Engineering at the Indian Institute of Science, where he is currently working as an Associate Professor. His research interests are in the areas of 5G techniques, energy harvesting communications, and sparse signal recovery. He has 47 journal papers and 82 conference papers to his credit. His paper won the best paper award in the National Conference on Communications, held at IIT Kanpur, India, in Feb. 2014. He served as an associate editor for the IEEE Signal Processing Letters during 2012-15. He is currently serving as an associate editor for the IEEE Transactions on Signal Processing, IEEE Transactions on Communications, and Sadhana, and is an elected member of the IEEE SPCOM Technical Committee for the years 2017-19.
Title: Evolution of the Network Perimeter, its security implications especially with IoT.
Bio: Venkatesh Ramachandran, Passed out of B.E Computer Science from R.V.College, Bangalore Worked in Cisco’s Network Management product suite for 6 years Joined Avenda Systems, a startup in Network Security domain as part of the core team. Worked primarily on Databases, Web Application stack including UI technologies and REST APIs. Also provided technical consulting for many major customer deployments of the product. Avenda Systems was acquired by Aruba Networks in Sep 2011 and it was positioned as Aruba ClearPass solution. Since then, working on Aruba ClearPass products and its integration with other Aruba products. Presently in a Distinguished Engineer role, redesigning the product using micro-services architecture and latest UI technologies. Filed a few patents during the last 5 years in the area of networking and network security.